1. Field of the Disclosure
The present disclosure relates to a method of manufacturing a high mobility polycrystalline Si film and a method of manufacturing a stacked transistor using the polycrystalline Si film.
2. Description of the Related Art
Polycrystalline Si, or “poly-Si”, is widely used in devices such as flat panel displays and solar cells, since poly-Si has greater mobility than a-Si (amorphous Si). Generally, polycrystalline Si electronic devices are formed on a substrate that has a high resistance to heat. However, recently, methods of manufacturing polycrystalline Si electronic devices on plastic substrates have been investigated. To avoid damaging the plastic, low temperature processes are needed to form these polycrystalline Si electronic devices. The low temperature is required not only to prevent thermal impact to the substrate, but also to reduce process defects caused by the conventional high temperature process. Plastic substrates for flat display devices have been studied, since plastic is flexible, light, and strong.
Poly-Si thin film transistors (TFTs) are known as devices that can be formed on a plastic substrate meeting the requirements. However, the poly-Si TFTs must be manufactured at a low temperature, to protect the plastic substrate.
Recently, an S3 static random access memory (SRAM) in a three dimensional structure has been developed, using a stacked transistor structure.
The size of a conventional SRAM cell is 80-90 F2 (F: feature size). However, the size of a single stack of the S3 SRAM cell in a three-dimensional structure is 46 F2, and the size of a double stack is 25 F2, which are ½-⅓ of the conventional sizes. This increases the versatility of SRAM, by increasing the capacity while maintaining the inherent characteristics such as low stand-by current and high speed.
The attempts to reduce chip size by manufacturing semiconductor devices in three dimensional structures continue. However, there is a need to develop techniques to simplify manufacturing processes and reduce cost.